1. Field of the Invention
The invention relates to the field of dynamic random-access memories, particularly metal-oxide-semiconductor memories.
2. Prior Art
Dynamic random-access memories (RAMs), particularly those fabricated with metal-oxide-semiconductor (MOS) technology are widely used in the electronics industry. In the past, many of the control functions associated with these dynamic memories, such as for refreshing, have been performed by circuitry external to the memory "chips". More recently, particularly for memory applications with microcomputers, more of these control functions are performed by the memory. This requires, for example, an on-chip refresh timing generator, arbitration circuitry to handle conflicts between external access requests and on-chip refresh requests, in addition to other circuitry.
The closest prior art RAMs known to the Applicant are described in U.S. Pat. Nos.: 4,038,646 and 3,978,459; and copending application, Ser. No. 070,132, filed Aug. 8, 1979 now U.S. Pat. No. 4,247,917 and assigned to the assignee of the present invention.
To improve fabrication yields for memories, redundant rows and/or columns, including related address decoders, are fabricated on the chip or substrate. These redundant circuits, of course, are used to replace faulty circuits within the memory array. An example of one prior art redundancy scheme is disclosed in copending application Ser. No. 867,779 filed Jan. 9, 1978 now U.S. Pat. No. 4,250,570 and assigned to the assignee of the present invention. As will be seen, the presently described RAM includes redundant circuits which are accessed in a unique manner.